Average-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits'

نویسندگان

  • Kevin W. James
  • Kenneth Y. Yun
چکیده

We describe an automated method (3D-map) for determining near-optimal decomposed generalized C-clement (gC) implementations of extended burst-mode asynchronous controllers. Average-case optimization is performed so that frequent paths are accelerated, possibly at the expense of less frequent paths. The overall effect, as quantified using Elmore delay analysis, is a circuit that has near-optimal performance for the average or common case.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits

We describe an automated method (3D-map) for determining near-optimal decomposed generalized C-element (gC) implementations of extended burst-mode asynchronous controllers. Average-case optimization is performed so that frequent paths are accelerated, possibly at the expense of less frequent paths. The overall effect, as quantified using Elmore delay analysis, is a circuit that has near-optimal...

متن کامل

Average-case technology mapping of asynchronous burst-mode circuits

This paper presents a technology mapper that optimizes the average performance of asynchronous burst-mode control circuits. More specifically, the mapper can be directed to minimize either the average latency or the average cycle time of the circuit. The input to the mapper is a burst-mode specification and its NAND-decomposed unmapped network. The mapper pre-processes the circuit’s specificati...

متن کامل

Optimizing average-case delay in technology mapping of burst-mode circuits

This paper presents technology mapping techniques that optimize for average case delay of asynchronous burst-mode control circuits. First, the speci cation of the circuit is analyzed using stochastic techniques to determine the relative frequency of occurrence of each state transition. Then, subject to timing and area constraints, the technology mapper minimizes the sum of the cycle times of th...

متن کامل

Automatic synthesis of extended burst-mode circuits. I.(Specification and hazard-free implementations)

We introduce a new design style called extended burst-mode. The extended burst-mode design style covers a wide spectrum of sequential circuits ranging from delay-insensitive to synchronous. We can synthesize multiple-input change asynchronous finite state machines, and many circuits that fall in the gray area (hard to classify as synchronous or asynchronous) which are difficult or impossible to...

متن کامل

A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic

A new design methodology for mapping circuits is discussed in this paper. It proposes two new techniques for mapping circuits. The rst method, known as the odd-level transistor replacement (OTR) method, has a goal that is similar to that of technology mapping, but without the restriction of a xed library size. The second technique, the Static/PTL method, uses a mix of static CMOS and pass trans...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2004